Once the scan reaches the end of the entire program it will execute the state of Output Y as FALSE. So if both Input A and Input B are TRUE at the same time, then in the ladder diagram above the first rung is evaluated and Output Y is set TRUE.īut, then the second rung is evaluated and Output Y is set FALSE. Remember the PLC scan runs from left to right and from top to bottom. In other words, Output Y is now unlatched…. Only when Input B changes state to TRUE will the Reset symbol change the state of Output Y back to FALSE. In other words, Output Y is latched TRUE…
Then, after subsequent scans, if Input A changes state to FALSE it does not affect the state of Output Y.
If Input A goes TRUE momentarily then the Set symbol changes the state of Output Y to TRUE. If Output Y is FALSE then it stays FALSE…. When both Input A and Input B are FALSE then the state of Output Y does not change. Remember Allen Bradley PLC’s use Latch and Unlatch symbols. Let’s start with the Set (Latch) and Reset (Unlatch) logic. Ladder Logic Latch with SET & RESET Symbols A great example of a device that can provide a momentary pulse to a PLC input is a push button. The inputs that set and reset the latch are usually momentary pulses.
Latching in a PLC requires at least one input to set the latch (Input A), one input to reset the latch (Input B) and one output to store the latch state (Output Y). Sometimes it just comes to personal preference. Simple applications requiring a latch are well suited to use latching logic.īut when it comes to more complex applications the use of Set (Latch) and Reset (Unlatch) symbols may be required. The disadvantage is that there is some inflexibility in programming because latching logic requires all the symbols to be on the same rung and may even overflow to the next rung. The advantage of latching logic is that troubleshooting is easier because the symbols used are all in the same rung. Quite often hold in logic is referred to as hold in logic. The disadvantage is that debugging can become more difficult because the Set (Latch) and Reset (Unlatch) symbols may be scattered throughout the program. Advantages include flexibility in programming because the Set (Latch) and Reset (Unlatch) symbols do not need to be in the same rung. These instructions simulate the function of an electromechanical latching relay. In an Allen Bradley PLC they are called Latch and Unlatch instructions. When we use the term latching in a PLC it refers to changing the state of an output to TRUE, holding the state of that output TRUE until certain conditions occur, then returning the state of the output back to FASLE. Latching is one of the most important pieces of ladder logic programming that you’ll ever use. Let’s take a look at some very simple, but extremely important ladder logic programming examples… Latching in a PLC Ladder Diagrams are composed of different types of contact, coil and function block elements. Ladder is based on Boolean principals and follows IEC 1131-3 conventions. Ladder Logic Ladder Editor VisiLogic: Ladder Programming 3 Ladder Logic You use Ladder Logic to write your project application. The timer can be set from 0.1 seconds to 10.0 seconds. These are an imitation of the actual ladder logic with the output devices. The Internal memory is for the processing element of the ladder logic chain. The virtual output is the last element in the ladder logic chain. So by creating ladder logic programming examples we can speed up or overall programming time.Ĭonstructing a program is then a simple matter of grabbing the appropriate ladder logic programming examples and connecting them in an orderly fashion. Experience tells us that once a piece of ladder logic is created that accomplished a specific task it can be re-used in other areas of the program and in other applications as well.